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Adds the first dynamic dimension to PLC/SPS targets: probe the running device over industrial protocols, complementing the static control-logic rules. - New ScanType::IcsProbe (+ phase), offered for PlcSps with a reachable endpoint (opt-in / default-off). - pipeline::ics::modbus — a minimal, read-only Modbus/TCP client: issues Read Holding Registers + Read Device Identification, never writes to the live process. Detects an endpoint that answers unauthenticated Modbus and reads its device identity (vendor/product/revision). - pipeline::ics::probe_target — emits findings: `ics-modbus-exposed` (Critical, CWE-306 — Modbus/TCP has no auth/encryption by protocol design) and `ics-device-disclosure` (Low, CWE-200). Targets the Modbus port (502) of the target's Live URL, independent of any WebVisu HTTP port. - orchestrator: a PLC/SPS target runs the ICS probe when planned (alongside the control-logic scan and DAST). Unit-tested against an in-process mock Modbus server + endpoint-parsing and device-id parsing tests. Docs: new "Dynamic testing — ICS protocol probe" section. First increment of #148 (soft-PLC + industrial-protocol probing); OPC UA / EtherNet-IP and the OpenPLC soft-PLC harness (orca-infra) follow. Tracker #167. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
98 lines
4.5 KiB
Markdown
98 lines
4.5 KiB
Markdown
# PLC / SPS Projects (CODESYS)
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Certifai analyzes industrial control logic (IEC 61131-3) for PLC/SPS targets such
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as CODESYS projects. A single PLC/SPS target is treated as a **composite device**:
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the control application *and* the device it runs on.
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| What you provide | What Certifai does |
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| --- | --- |
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| PLC project (PLCopen XML / ST, or a `.projectarchive`) | **Control-logic SAST** — semantic security rules over ST **and** graphical FBD/LD |
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| A `.projectarchive` | **Control-app SBOM** — the referenced CODESYS libraries + the runtime version, matched against known CVEs |
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| A device firmware image | Firmware SBOM / CVE (opt-in) |
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| A reachable endpoint (WebVisu, OPC UA) | DAST / pentest (opt-in) |
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## Two ways to deliver the project
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You can either **upload** the project when onboarding, or point Certifai at a
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**git repository** (recommended — every scan is just a `git pull`, no re-upload).
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### Option A — Upload
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On the onboarding wizard, choose target type **PLC / SPS**, then attach a **PLC
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project** artifact and pick its format:
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- **PLCopen XML** (`.xml`) — export from CODESYS via *Project → Export PLCopenXML*.
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- **Structured Text** (`.st`) — a raw ST file.
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- **Project archive** (`.projectarchive`) — *File → Project Archive → Save/Send
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Archive…* with **"Referenced libraries"** ticked. This is the only form that
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also yields the **library + runtime SBOM**.
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### Option B — Git repository (recommended)
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Attach a **Git repository** artifact to the PLC/SPS target. Certifai clones it and
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runs the control-logic scan over the exported source in the repo.
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## Best-case git repository layout
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Because the binary `.project` does not diff or merge in git, commit **textual
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exports** for review-friendly SAST, and include the **`.projectarchive`** so the
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library/runtime SBOM is available too:
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```text
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my-plc-project/
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├── src/
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│ ├── PLC_PRG.xml # PLCopen XML export (ST or FBD/LD) — one per POU
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│ ├── PumpController.xml
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│ ├── SafetyInterlock.xml
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│ └── GVL.xml # global variable lists, also as PLCopen XML
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├── PumpStation.projectarchive # optional but recommended → library + runtime SBOM
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└── README.md
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```
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**Guidelines**
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- **Export to PLCopen XML** (`Project → Export PLCopenXML`), one file per POU, and
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commit those. ST, **and graphical FBD/LD**, are both analyzed.
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- Alternatively commit raw `.st` / `.exp` / `.scl` files — also analyzed.
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- **Do not** commit only the binary `.project` — it cannot be parsed (and does not
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diff). If you want the library SBOM, commit the **`.projectarchive`** as well.
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- CODESYS's built-in Git integration, which stores an exported representation,
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works too — as long as the committed form is PLCopen XML / textual.
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::: tip What unlocks what
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- **Control-logic SAST** needs textual source in the repo (PLCopen XML or `.st`).
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- **Library + runtime SBOM** needs a **`.projectarchive`** — PLCopen XML exports do
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**not** carry the referenced libraries.
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:::
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## What the scanner finds
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The control-logic rules are CWE-mapped and include: hardcoded credentials
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(CWE-798), default/weak passwords (CWE-1393), safety interlock / watchdog bypass
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(CWE-1384), unchecked array indexing (CWE-129), division-by-zero (CWE-369,
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guard-aware), cleartext/insecure communication (CWE-319), insecure protocol ports
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(CWE-319, e.g. Modbus 502, FTP 21, Telnet 23), and unstructured jumps (CWE-691).
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The **SBOM** view lists the CODESYS libraries (`pkg:codesys/<name>@<version>`) and
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the runtime; matching runtime components (e.g. the `Cmp*` / `3SLicense` libraries)
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surface real CODESYS advisories as CVE alerts.
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## Dynamic testing — ICS protocol probe
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Beyond the static analysis, Certifai can **probe the running device** over
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industrial protocols. Attach a **Live URL** artifact (the device host / WebVisu
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URL) to the PLC/SPS target and enable the **ICS Probe** scan.
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The probe is **read-only** — it never writes to the live process. It currently
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speaks **Modbus/TCP** (port 502): it confirms whether the device answers
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unauthenticated Modbus requests and reads its device identity (vendor / product /
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revision). Because Modbus/TCP has no authentication or encryption in the protocol,
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a reachable endpoint that answers is reported as an exposed control interface
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(CWE-306). OPC UA and EtherNet/IP probes are planned.
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::: warning
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The ICS probe connects to the live device. It is **opt-in** (off by default) and
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should only be run against targets you are authorized to test. It performs reads
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only, never writes.
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:::
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